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DSO203 Bandwidth restrictions

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发表于 2017-4-26 13:14:11 | 显示全部楼层 |阅读模式
[i = s] posts by Zetopan in 2017-4-26 14:11 Edit

[i = s] posts by Zetopan in 2017-4-26 14:11 Edit  

For reasons beyond my meager comprehension the analog bandwidth of the DSO203 seems to be set artificially low. The C73 and C74 (feedback capacitors on U17 and U18, respectively) limit the bandwidth to about 4.4 MHz, even though the analog bandwidth is often reported as being 8MHz.  And this is when it is not being bizarrely misreported, like mistaking the 72 MHz sample rate for the analog bandwidth.

Towards improving that low bandwidth, I offer the following suggested circuit component changes.  Changing C73 and C74 from 33 pF to 13 pF will result in the following X1 probe sensitivity scales having a bandwidth of between 10MHz and 11MHz.  That is a slightly higher than the optimal bandwidth, since the amplitude response at the Nyquist frequency will only be down by about 9 to 15 dB, but it is all for a good reason, as you will soon see.

  The following scales would have a 10 to 11 MHz analog bandwidth after the above change: 100mV, 200mV, 500mV, 2V, 5V, and 10V.

Notably missing from the above are the 50mV and 1V scales.  That is because they have the highest feedback gains (nominally 10X) so their 0.5pF feedback capacitors (C10 and C11) and the opamp gain-bandwidths comes into play. The above changes plus removing all four of the 0.5pF feedback capacitors for U1 and U2 results in an analog bandwidth of 6.7MHz for both the A and B channels at these two sensitivity settings.  This could be boosted to an actual 8MHz by inserting a 100uH inductor in series with each one of the four 27K feedback resistors (R11, R12, R13, and R14).  This series connection of 27K and 100uH would provide sufficient boost to get the 50mV and 1V sensitivity ranges to reach an analog bandwidth of 8MHz, and be 22dB down at the Nyquist frequency.

Adding additional feedback capacitors in parallel with the feedback resistors for the 6 previously listed sensitivity ranges could be used to drop the analog bandwidth to 8MHz for all 8 of the sensitivity ranges, which would be provide a constant bandwidth as well as 22dB of attenuation at the Nyquist frequency of 36MHz (this assumes a 72MHz sampling rate for each channel).

In summary:
1. Changing C73 and C74 from 33pF to 13pF boosts the 4.4MHz analog bandwidth of two of the sensitivity settings to 4.5MHz, and the six remaining sensitivity settings to between 10MHz and 11MHz.  This is a very practical change since it requires swapping surface mount components.

2. Removing the four 0.5pF feedback capacitors boosts the analog bandwidths of two of the sensitivity settings to 6.7MHz and it does not affect any other sensitivity settings.  This is a very practical change since it requires removing some surface mount components.

3. Also adding 100uH inductors in series with the respective 27K feedback resistors boosts the analog bandwidths of two of the sensitivity settings to 8MHz and it does not affect any other sensitivity settings.  This may not be practical from a circuit board layout perspective given the limited size of the circuit board since it requires adding four additional surface mount components.

4. Also adding feedback capacitors to the appropriate feedback resistors for the 6 sensitivity ranges would guarantee an essentially constant 8MHz bandwidth for all sensitivity settings.  This is less likely to be practical since it requires adding 12 surface mount capacitors, which would surely require too much circuit board space.

Of course there are yet other possible alternatives like changing C73 and C74 from 33pF to 17pF, and removing the 0.5pF feedback capacitors.  This results in a 8MHz bandwidth for all six of the previously mentioned sensitivity settings, with the remaining two sensitivity settings having bandwidths of 5.8MHz.  This is still a significant improvement over the original 4.4MHz for essentially all of the sensitivity settings.
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发表于 2017-4-27 10:27:34 | 显示全部楼层
It's nice to see you are also very lucky to advice, do you have research on DS203 circuit is, to put forward the enhancement and improvement.
We will earnestly study and test the advice provided by you.
You the enthusiasm is the original intention of our open source information, hope you later with more feedback.
gratitude
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 楼主| 发表于 2017-4-28 20:41:10 | 显示全部楼层
I do not yet have a DSO203 but I am planning on purchasing one as soon as I can locate a late hardware version.  This is proving somewhat difficult since the vendors do not seem to know what hardware version they are selling.  My suggestions are based on simply viewing the latest version schematic that I could find, and also by using a circuit simulator to model the analog end to end behavior for confirmation of my observations and hand calculations.

Of course I would also provide more details after actually getting a DSO203 and modifying it for myself.  The current DSO203 is a fairly attractive implementation in a nice small package, but it currently has some shortcomings that should be fairly easy to correct, at least in my view.  I am well aware of the limited circuit board space and would try to only come up with improvements that are actually feasible to implement within the obviously limited space.

One computational measurement mode that I noticed that was missing is computing Channel A times Channel B.  This can be quite useful.  As an example: by measuring the voltage on the collector of a transistor with one channel while simultaneously measuring the current in the transistor (obviously both signal sources must share a common ground).  Computing and displaying the product of those two signal inputs would show the instantaneous power in the transistor or whatever other circuit was being monitored in a similar manner, with one channel representing the current.  The resulting units would be unknown to the DSO203 since only the voltage magnitudes are known while the actual current magnitude would be unknown, unless there was a convenient method for the user to enter the scale factor.

However, the DOS203 does not really even need to know the current scale factor for this mode to be useful, since the user would know it (Amps / Volts conversion factor) and thus would know the effective scale factor in terms of Watts / division on the display.  The power waveform display would need to autoscale to always be able to display the peak power and the display units could simply be the product of the two voltage scale factors to get the per division scale to be useful for the user.  Performing this computation is no more difficult for the ARM CPU in the DSO203 than computing A - B or A + B.
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